Abstract Electronically variable delays for beamforming are generally realized by phase shifters. Although a constant phase shift can approximate a time delay in a limited frequency band, this does not hold for larger arrays that scan over wide angles and have a large instantaneous bandwidth. In thi
Phased arrays in CMOS for consumer communication bands aim to enhance receiver performance by exploiting beamforming with antenna arrays. Sensitivity increases with the number of antenna elements through array gain and interferers can be cancelled through the spatial filtering of the beam pattern [1
A 1-4GHz 4-element phased array receiver frontend demonstrates spatial interferer rejection using null steering. Element phase and amplitude control are performed by a switchedcapacitor vector modulator with integrated downconversion, utilizing a rational sine/cosine approximation. The 65nm CMOS rec
Abstract-Practical time delay circuits do not have a perfectly linear phase-frequency characteristic. When these delay circuits are applied in a phased-array system, this frequency dependency shows up as a frequency dependent beam direction (“beam squinting”). This paper quantifies beam squinting fo
Phased-array receivers provide two major benefits over single-antenna receivers. Their signal-to-noise ratio (SNR) doubles for each doubling in the number of elements, resulting in extended range. Secondly, interferers can be rejected in the spatial domain for increased link robustness. These arrays
This paper presents an integrated design strategy for chip layout optimization. The strategy couples both electric and thermal aspects during the conceptual design phase to improve chip performances; thermal management being one of the major topics. The layout of the chip circuitry is optimized acco
A wide variety of voltage mixers and samplers are implemented with similar circuits employing switches, resistors, and capacitors. Restrictions on duty cycle, bandwidth, or output frequency are commonly used to obtain an analytical expression for the response of these circuits. This paper derives un
A Ku-band downconverter MMIC for satellite reception has been developed. This four channel downconverter contains four dual input LNAs, mixers and IF amplifiers and a single LO balun. The MMIC was designed in the PL15-10 pHEMT InGaAs low noise process of WIN Semiconductors.
An integrated X-band FMCW front-end is reported. The front-end unites the core functionality of an FMCW transmitter and receiver in a 0.25 μm SiGe BiCMOS process. The chip integrates a PLL for the carrier generation, and single-side band and image-reject mixers for up- and down-conversion of the wav
During the past five years, dielectric and metallic post-wall waveguides (PWWGs) have been analyzed at TNO Defence, Security and Safety, using both an integral equation approach and a modal approach. The model developed focuses on TEn0 modes facilitating the analysis of infinitely-long, straight PWW
Go to page top
Go back to contents
Go back to site navigation