| In battery-powered, embedded systems energy consumption is an important concern. Since for many embedded devices off-chip memory accesses consume more power than the datapaths and the control units, large power savings can be achieved by making effective use of on-chip memory. The general goal of the proposed PROFESY project is to reduce the amount of data traffic between the processor (on-chip memory) and off-chip memory in order to minimize power dissipation. Special attention will be given to pointer-intensive dynamic applications, because static (compiler) techniques are sparsely effective for such applications. In particular, the objectives are two-fold. First, to develop a toolset (simulator/profiler) that determines the program segments that dissipate the most energy and, more importantly, that identifies the causes for the energy consumption. For example, the profiler might reveal that a particular fragment incurs many cache misses because two data structures interfere with each other. Provided with this information it can be decided to map these data structures onto different memory units. The second objective is to investigate if and how dynamic (hardware) techniques can be converted to profiling techniques. Dynamic techniques are potentially more effective than static techniques but require additional hardware that also dissipates energy. As an example, we propose separate load instructions that bypass the cache, only cache the requested word, or cache the entire block. The profiler determines the type of locality (temporal, spatial, or no locality) exhibited by a load and directs the compiler to generate the appropriate instruction. |
